Adiabatic CMOS Circuit Design: Principles and Examples
نویسندگان
چکیده
with the Department of Information and Electronic Engineering, Zhejiang University, Hangzhou 310027, People’s Republic of China. M Pedram is with the Department of Electrical Engineering-Systems, University of Southern California, Los Angeles CA 90089, USA. Adiabatic CMOS Circuit Design: Principles and Examples X. Wu, G. Hang, and M. Pedram Abstract: In view of changing the type of energy conversion in CMOS circuits and thereby achieving ultra-low-power design, this paper investigates adiabatic CMOS circuits, which use a slow-ramping power clock. First, algebraic expressions for and properties of power-clocked signals are discussed. Then the design of adiabatic gates based on AC power supply and CMOS transmission gates is analyzed. On this basis, basic rules for the design of adiabatic circuits are proposed, and a design example of an adiabatic full adder is demonstrated. PSPICE simulations using a trapezoidal power-clock demonstrate that the designed adiabatic combinational circuits have a correct logic function and low-power characteristics.
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